Programmable data port clocking system for clocking a plurality of data ports with a plurality of clocking signals in an asynchronous transfer mode system
US5680595A · kind A · utility
21Cited by
4References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 7, 1995 |
| Grant date | Oct 21, 1997 |
| Priority date | — |
| Expiry date | Jun 7, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5674
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A programmable multiconfiguration data port clocking system for use in asynchronous transfer mode communication (ATM) networks. The clocking system is programmed using a number of preselected configuration codes to automatically switch the clocking of the data port configuration of an ATM network chip. The clocking system incorporates an automatic disable circuit for eliminating random outputs from unused pins in the clocking hardware. The clocking system also employs a noise suppression circuit for reducing spurious noise into the ATM network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.