Flash memory erase with controlled band-to-band tunneling current
US5699298A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 1996 |
| Grant date | Dec 16, 1997 |
| Priority date | — |
| Expiry date | Oct 7, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Substantial reduction in peak current encountered during an erase process for a flash memory device is achieved by selection of source voltage potential during the erase according to the expected band-to-band tunneling current encountered during the process. During the beginning of the process, a lower source voltage potential is selected, which is high enough to cause significant erasing while suppressing band-to-band tunneling current in a portion of the array, and during a second part of the erasing process, a higher source potential is utilized, which ensures successful erasing of the array, without exceeding the peak current requirements of the power supply used with the device. The first and second parts of the erase sequence will induce band-to-band tunneling current in addition to Fowler-Nordheim tunneling current. The band-to-band tunneling current is characterized by a turn on threshold source potential which is inversely related to the threshold of the cell receiving the voltage sequence. The source voltage used in the first part of the erase sequence is set at level that is near or above the turn on threshold source potential for higher threshold cells that are in the h…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.