Method of fabricating semiconductor devices with a passivated surface
US5719088A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 1995 |
| Grant date | Feb 17, 1998 |
| Priority date | — |
| Expiry date | Nov 13, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating semiconductor devices with a passivated surface includes providing a contact layer on a substrate so as to define an inter-electrode surface area. A first layer and an insulating layer, which are selectively etchable relative to each other and to the substrate and the contact layer, are deposited on the contact layer and the inter-electrode surface area. The insulating layer and the first layer are individually and selectively etched to define an electrode contact area and to expose the inter-electrode surface area. The exposed inter-electrode surface area is passivated, either subsequent to or during the etching of the first layer. A metal contact is formed in the electrode contact area in abutting engagement with the insulating layer so as to seal the inter-electrode surface area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.