Method of making porous-Si capacitors for high density drams cell
US5723373A · kind A · utility
22Cited by
3References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 18, 1996 |
| Grant date | Mar 3, 1998 |
| Priority date | — |
| Expiry date | Nov 18, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/712
Abstract
The present invention is a method of manufacturing porous-Si capacitors for use in semiconductor memories. The present invention uses a silicon oxide layer as an etching mask to etch a polysilicon layer to form a porous-Si structure. The etching process is performed to etch a portion of the polysilicon layer and to etch away the remaining HSG-Si. Next, an oxide layer which is in micro grooves is removed to define a porous-Si bottom storage. The present invention can be used to increase the surface area of the capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.