Method of making leadframe for lead-on-chip (LOC) semiconductor device
US5724726A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 1996 |
| Grant date | Mar 10, 1998 |
| Priority date | — |
| Expiry date | Mar 13, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49172
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a semiconductor device having a lead-on-chip structure includes bending a die pad extending from an outer frame outwardly from the outer frame. Thereafter, with the die pad in a convenient position, a semiconductor chip is die-bonded to the die pad. Thereafter, the die pad is bent back toward the outer frame so that it is generally parallel to but spaced from the outer frame with leads extending from the outer frame being generally parallel to the semiconductor chip. Electrodes of the semiconductor chip are connected by wire-bonding to the leads extending from the outer frame. After resin molding, the outer frame lying outside the resin package is severed and removed, completing the lead-on-chip semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.