Method for shallow trench isolation
US5728621A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 1997 |
| Grant date | Mar 17, 1998 |
| Priority date | — |
| Expiry date | Apr 28, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76224
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A new method for forming planarized high quality oxide shallow trench isolation is described. A nitride layer overlying a pad oxide layer is provided over the surface of a semiconductor substrate. A plurality of isolation trenches is etched through the nitride and pad oxide layers into the semiconductor substrate wherein there is at least one first wide nitride region between two of the isolation trenches and at least one second narrow nitride region between another two of the isolation trenches. A high density plasma (HDP) oxide layer is deposited over the nitride layer filling the isolation trenches wherein the HDP oxide deposits more thickly in the first region over the wide nitride layer and deposits more thinly in the second region over the narrow nitride layer and wherein the difference in step heights of the HDP oxide between the first region and a region overlying an isolation trench is a first height. A layer of spin-on-glass is coated over the HDP oxide layer wherein the difference in step heights of the spin-on-glass material between the first region and the region overlying an isolation trench is a second height smaller than the first height. The spin-on-glass layer and…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.