Method of making corner protected shallow trench field effect transistor
US5741738A · kind A · utility
30Cited by
10References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 21, 1996 |
| Grant date | Apr 21, 1998 |
| Priority date | — |
| Expiry date | Feb 21, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76224
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure to prevent gate wrap-around and corner parasitic leakage comprising a semiconductor substrate having a planar surface. A trench is located in the substrate, the trench having a sidewall. An intersection of the trench and the surface forms a corner. A dielectric lines the sidewall of the trench. And, a corner dielectric co-aligned with the corner extends a subminimum dimension distance over the substrate from the corner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.