Jack A. Mandelman
41Patents
19h-index
43Co-inventors
77Inventor score
Filing activity: Dec 2, 1994 → Jul 5, 2007
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6825529B2 | Stress inducing spacers | Electricity | 148 | Expired |
| US6717216B1 | SOI based field effect transistor having a compressive film in undercut area under the channel and a method of making the device | Electricity | 148 | Expired |
| US6974981B2 | Isolation structures for imposing stress patterns | Electricity | 105 | Expired |
| US6534807B2 | Local interconnect junction on insulator (JOI) structure | Electricity | 71 | Expired |
| US6720630B2 | Structure and method for MOSFET with metallic gate electrode | Emerging Cross-Sectional Technologies | 69 | Expired |
| US5521422A | Corner protected shallow trench isolation device | Electricity | 67 | Expired |
| US6555891B1 | SOI hybrid structure with selective epitaxial growth of silicon | Electricity | 62 | Expired |
| US6320225A | SOI CMOS body contact through gate, self-aligned to source- drain diffusions | Electricity | 59 | Expired |
| US7388259B2 | Strained finFET CMOS device structures | Electricity | 54 | Expired |
| US6780694B2 | MOS transistor | Electricity | 54 | Expired |
| US5643822A | Method for forming trench-isolated FET devices | Electricity | 46 | Expired |
| US5773362A | Method of manufacturing an integrated ULSI heatsink | Emerging Cross-Sectional Technologies | 42 | Expired |
| US6635543B2 | SOI hybrid structure with selective epitaxial growth of silicon | Electricity | 42 | Expired |
| US7485520B2 | Method of manufacturing a body-contacted finfet | Electricity | 38 | Active |
| US7173310B2 | Lateral lubistor structure and method | Electricity | 34 | Expired |
| US5741738A | Method of making corner protected shallow trench field effect transistor | Electricity | 30 | Expired |
| US5614433A | Method of fabricating low leakage SOI integrated circuits | Emerging Cross-Sectional Technologies | 26 | Expired |
| US6544874B2 | Method for forming junction on insulator (JOI) structure | Electricity | 22 | Expired |
| US5729052A | Integrated ULSI heatsink | Emerging Cross-Sectional Technologies | 21 | Expired |
| US6335248B1 | Dual workfunction MOSFETs with borderless diffusion contacts for high-performance embedded DRAM technology | Electricity | 19 | Expired |
| US6806534B2 | Damascene method for improved MOS transistor | Electricity | 18 | Expired |
| US6884667B1 | Field effect transistor with stressed channel and method for making same | Electricity | 18 | Expired |
| US6562666B1 | Integrated circuits with reduced substrate capacitance | Electricity | 17 | Expired |
| US7374987B2 | Stress inducing spacers | Electricity | 17 | Expired |
| US6686637B1 | Gate structure with independently tailored vertical doping profile | Electricity | 13 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.