Semiconductor integrated circuit device, method for manufacturing the same, and logical circuit
US5747847A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 1996 |
| Grant date | May 5, 1998 |
| Priority date | — |
| Expiry date | Sep 6, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
A semiconductor integrated circuit device having a SOI structure which can prevent a deterioration in the breakdown voltage of a transistor without damaging integration, and a method for manufacturing the semiconductor integrated circuit device are obtained. An embedded oxide film is not formed over the whole face of a P type silicon layer but has an opening in a region which is placed below a gate electrode. The opening is filled in to form a penetration P layer. Accordingly, a SOI layer is electrically connected to the P type silicon layer through the penetration P layer. The plane position and shape of the gate electrode conform to those of the penetration P layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.