Distributed processing memory chip with embedded logic having both data memory and broadcast memory
US5751987A · kind A · utility
546Cited by
16References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 4, 1995 |
| Grant date | May 12, 1998 |
| Priority date | — |
| Expiry date | May 4, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7821
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory chips with data memory (202), embedded logic (206) and broadcast memory (204) for two modes of operation are disclosed. A first mode of operation is the usual memory mode expected of a data RAM. The second mode of operation allows localized computation and/or processing of the data in data memory (202) by the embedded logic (206) with minimal handshaking with a remote CPU. In a functioning system, the memory chips are organized in a hierarchical manner and include address-associative memory systems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.