Mark G. Harward
14Patents
8h-index
15Co-inventors
61Inventor score
Filing activity: Jun 29, 1990 → Jun 7, 1996
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5751987A | Distributed processing memory chip with embedded logic having both data memory and broadcast memory | Physics | 546 | Expired |
| US5426614A | Memory cell with programmable antifuse technology | Physics | 44 | Expired |
| US5489796A | Integrated circuit resistor comprising amorphous silicon | Emerging Cross-Sectional Technologies | 32 | Expired |
| US6226766A | Method and apparatus for built-in self-test of smart memories | Physics | 28 | Expired |
| US5751162A | Field programmable gate array logic module configurable as combinational or sequential circuits | Electricity | 16 | Expired |
| US5287304A | Memory cell circuit and array | Physics | 11 | Expired |
| US5485105A | Apparatus and method for programming field programmable arrays | Physics | 10 | Expired |
| US5877059A | Method for forming an integrated circuit resistor comprising amorphous silicon | Emerging Cross-Sectional Technologies | 8 | Expired |
| US6154861A | Method and apparatus for built-in self-test of smart memories | Physics | 6 | Expired |
| US5428304A | Programmable gate array with special interconnects for adjacent gates and isolation devices used during programming | Electricity | 6 | Expired |
| US5068825A | Memory cell circuit and operation thereof | Physics | 6 | Expired |
| US5488315A | Adder-based base cell for field programmable gate arrays | Physics | 5 | Expired |
| US5469078A | Programmable logic device routing architecture | Electricity | 3 | Expired |
| US5723988A | CMOS with parasitic bipolar transistor | Electricity | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.