"Method and circuit for detecting boron (""B"") in a semiconductor device using threshold voltage (""V"") fluence test"
US5757204A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 1996 |
| Grant date | May 26, 1998 |
| Priority date | — |
| Expiry date | Mar 28, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2621
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and circuit for detecting boron at an interface between a p-type polysilicon gate and silicon dioxide gate dielectric is provided. A V.sub.t fluence test using about -6.67 mA/cm.sup.2 is used to detect boron at the interface. A p-channel metal oxide semiconductor ("PMOS") device having a source, drain, substrate, gate and silicon dioxide layer are connected to ground and a current source in order to detect the boron. An about -6.67 mA/cm.sup.2 current is applied to the PMOS gate while the source, substrate and drain are grounded. Various changes in threshold voltages are observed over different stress times. The boron concentration at the polysilicon/gate dielectric interface has been detected by the shift in threshold voltage. The concentration of boron at the interface has been found to degrade oxide quality as evidenced by charge-to-breakdown ("Q.sub.BD ") test of the oxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.