Heteroepitaxial semiconductor device including silicon substrate, GaAs layer and GaN layer #13
US5760426A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 1996 |
| Grant date | Jun 2, 1998 |
| Priority date | — |
| Expiry date | Jul 16, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/01335
Abstract
A semiconductor device includes an Si substrate, a stress absorbing layer of GaAs and disposed on the Si substrate, a buffer layer having a composition of Al.sub.x Ga.sub.1-x-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) and disposed on the stress absorbing layer, and a compound semiconductor layer having a composition of Al.sub.x Ga.sub.1-x-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) and disposed on the buffer layer. Therefore, the buffer layer protects the GaAs stress absorbing layer from high temperatures during the formation of the compound semiconductor layer, whereby the stress absorbing layer is prevented from decomposition. As a result, a stress due to lattice mismatch or thermal stress between the Si substrate and the compound semiconductor layer is absorbed in the GaAs stress absorbing layer having a lowest bulk modulus, whereby a compound semiconductor layer with reduced dislocations may be grown on the buffer layer and bending of the Si substrate prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.