Method of forming lightly doped drains in metalic oxide semiconductor components
US5770508A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 1997 |
| Grant date | Jun 23, 1998 |
| Priority date | — |
| Expiry date | Jun 4, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
Abstract
The present invention relates to a method of forming lightly doped drains in metallic oxide semiconductor (MOS) components. The method includes forming a first, second, and third insulating layer above a silicon substrate having a gate, etching back the layers to leave behind L-shaped first spacers on sidewalls of the gate, followed by doping second type ions into the silicon substrate to form first lightly doped drains in the silicon substrate surface below the L-shaped first spacers, and second lightly doped drains in the silicon substrate surface elsewhere, further forming a fourth insulating to form third spacers, and using the using the third spacers, the first insulating layer, and the gate as masks when doping second type ions into the silicon substrate so as to form source/drain regions in silicon substrate surfaces not covered by the third spacers. Such a method produces greater yield and reduces leakage current from the transistor components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.