Method for fabricating dielectric films for non-volatile electrically erasable memories
US5780342A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 5, 1996 |
| Grant date | Jul 14, 1998 |
| Priority date | — |
| Expiry date | Dec 5, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28211
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a high-performance oxide as a tunneling dielectric for non-volatile memory applications. A silicon film containing amorphous silicon and good crystalline silicon micrograins is deposited in a silicon substrate by a LPCVD system. Then, a oxidation is performed at a temperature selected in a range such that non-uniform epitaxial silicon growth occurs at the silicon substrate. During an initial thermal oxidation process, the amorphous silicon region is quickly oxidized to form SiO.sub.2 and the good-crystalline silicon micrograins are also quickly oxidized to form the silicon-rich SiO.sub.2 (TOAS). In a following oxidation process, silicon precipitates are formed at the silicon-enriched region and the non-uniform epitaxial silicon growth is also enhanced at the silicon-enriched region. The enhanced non-uniformed silicon growth creates mild microtips. The silicon precipitates connect to the mild silicon microtips. Subsequently during the oxidation the ultra-high and sharp microtips are formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.