Method for erasing an electrically programmable and erasable non-volatile memory cell
US5784319A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 24, 1997 |
| Grant date | Jul 21, 1998 |
| Priority date | — |
| Expiry date | Jan 24, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for erasing an electrically programmable and erasable non-volatile memory cell having a control electrode, an electrically-insulated electrode and a first electrode. The method provides for coupling the control electrode to a first voltage supply and coupling the first electrode to a second voltage supply. The first voltage supply and the second voltage supply are suitable to cause tunneling of electric charges between the electrically-insulated electrode and the first electrode. The method also provides for a constant current to flow between the second voltage supply and the first electrode of the memory cell for at least part of an erasing time of the memory cell, the constant current having a prescribed value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.