High density memory and double word ferroelectric memory cell for constructing the same
US5789775A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 26, 1996 |
| Grant date | Aug 4, 1998 |
| Priority date | — |
| Expiry date | Jan 26, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/5657
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high density non-volatile ferroelectric-based memory based on a ferroelectric FET operated in a two terminal write mode. Storage words may be constructed either from one or two bit storage cells based on a ferroelectric FET. A memory using either the one or two bit storage cells includes a plurality of word storage cells organized into a rectangular array including a plurality of columns and rows. Each of the word storage cells includes N single bit memory cells. Each of the single bit memory cells includes a pass transistor and a ferroelectric storage element. All of the gate electrodes in the circuit are connected to a common gate electrode, and all of the source electrodes are connected to a common source electrode. If the memory is built from two bit storage cells as described herein, each storage cell is one half of a two bit storage cell. All of the common source electrodes in each one of the columns are connected electrically to a column electrode corresponding to that column and all of the pass gates in each of the rows are connected electrically to a row electrode corresponding to that row. A memory address includes a plurality of bits divided into first and second group…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.