Mapping processor state into a millicode addressable processor state register array
US5802359A · kind A · utility
23Cited by
11References
2Claims
0Family size
Assignee
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Key dates
| Filing date | Jul 14, 1997 |
| Grant date | Sep 1, 1998 |
| Priority date | — |
| Expiry date | Jul 14, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3861
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A milli-mode system has a processor state unit (R-unit) with register space into which those system operating registers and control latches, which make up the processor architected state, are mapped. This processor state unit, which includes a processor state register array and associated controls, receives all state updates from the processor as data and register addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.