Method of forming transistor electrodes from directionally deposited silicide
US5814537A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Dec 18, 1996 |
| Grant date | Sep 29, 1998 |
| Priority date | — |
| Expiry date | Dec 18, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/147
Abstract
A method is provided for forming silicide surfaces on source, drain, and gate electrodes in active devices to decrease the resistance of the electrode surfaces, without consuming the silicon of the electrodes in the process. Silicide is directionally deposited on the electrodes so that a greater thickness accumulates on electrode surfaces, and a lesser thickness accumulates on the gate sidewall surfaces isolating the gate from the source/drain electrodes. Then, the electrodes are isotropically etched so that the lesser thickness on the sidewalls is removed, leaving at least some thickness of silicide covering the electrodes. In further steps, the electrodes are masked with photoresist, and any silicide deposited in the region of field oxide around the electrodes is removed. Conductive lines, connecting to the electrodes across the field oxide, are fabricated from polycide, which includes a level of polysilicon covered with silicide, when the lower resistance surface of a metal-disilicide overlying the conductive line is required. The method of the present invention is applicable to bulk silicon, as well as SIMOX, transistor fabrication processes. An IC structure having different th…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.