Mask ROM device with gate insulation film based in pad oxide film and/or nitride film
US5815433A · kind A · utility
11Cited by
7References
14Claims
0Family size
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Inventor
Key dates
| Filing date | Dec 22, 1995 |
| Grant date | Sep 29, 1998 |
| Priority date | — |
| Expiry date | Dec 22, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/49
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cell portion 10 of a MOS structure and a redundant cell portion 12 of an MNOS structure are formed in a single semiconductor substrate. These MOS and MNOS structures commonly include an oxide film 26. A laminate structure consisting of a silicon nitride film and a pad oxide film and used in the element separation step is included in the redundant cell portion 12. Therefore, the redundant circuit can be naturally formed without increasing the number of process steps, leading to a high yield without inviting an increase in the manufacturing cost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.