Programmed reference
US5828601A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 1993 |
| Grant date | Oct 27, 1998 |
| Priority date | — |
| Expiry date | Dec 1, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5634
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable reference used to identify a state of an array cell in a multi-density or low voltage supply flash EEPROM memory array. The programmable reference includes one or more reference cells, each reference cell having a floating gate which is programmed to control its threshold value. The array cells are read by applying an identical voltage to the gate of the array cell and the reference cell and comparing outputs to determine the array cell state. During read of an array cell, the programmable reference cell is biased the same as the array cell, so that the difference in threshold values between reference cells and array cells remain constant with a change in V.sub.CC. Circuitry is included for programming the reference cells utilizing a simple resistor ratio. Programming is performed at test time, preferably by the manufacturer, to assure V.sub.CC remains within strict tolerances. The array cells are programmed and read without resistor biasing and under looser tolerances using the reference cells at a later time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.