Manufacturing method for semiconductor device
US5830771A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 1995 |
| Grant date | Nov 3, 1998 |
| Priority date | — |
| Expiry date | Sep 8, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
The insulating ability of a semiconductor device of two-layer gate electrode structure, such as EPROM, is improved at the upper surface of the first gate electrode as well as at the upper and lower edge parts of the first gate electrode. A LOCOS film is formed on a semiconductor substrate, and a floating gate is formed by patterning. Next, the first oxide film is formed on the floating gate, and then the first oxide film is etched out. Subsequently, the second oxide film is formed on the floating gate, and a control gate is formed on the floating gate using the second oxide film as an inter-layer insulating film. As a result of these two oxidations of the first and second oxide films and the removal of the first oxide film, the asperity of the upper surface of the floating gate is removed, and the upper and lower edge parts thereof are shaped into a round form.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.