Raised silicided source/drain electrode formation with reduced substrate silicon consumption
US5830775A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Nov 26, 1996 |
| Grant date | Nov 3, 1998 |
| Priority date | — |
| Expiry date | Nov 26, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/019
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is provided for forming silicided source/drain electrodes in active devices wherein the electrodes have very thin junction regions. In the process silicidation material is deposited on the wafer and rapid-thermal-annealed at a temperature and for a time calculated to produce metal-rich or silicon-deficient silicide on the electrodes. The metal-rich or silicon-deficient silicide is selectively formed on the semiconductor electrodes and not on oxide or other insulating surfaces. A selective etch removes the silicidation material which has not reacted with silicon, including metal overlying insulating surfaces. Then, after cleaning the silicide surfaces, a layer of silicon is deposited over the structure and a second rapid thermal anneal is performed at a higher temperature than the first rapid thermal anneal. In the second rapid thermal anneal additional silicon from the deposited silicon layer is incorporated into the silicide converting it from metal-rich or silicon-deficient silicide into the more stable disilicide phase silicide. Upon removal of any unconsumed silicide, the disilicide contacts are completed. The process can be controlled to produce ultra-thin junction de…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.