Built-in test scheme for a jitter tolerance test of a clock and data recovery unit
US5835501A · kind A · utility
44Cited by
3References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 4, 1996 |
| Grant date | Nov 10, 1998 |
| Priority date | — |
| Expiry date | Mar 4, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/24
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A jitter test system for a clock and data recovery unit (CRU) is comprised of a data generating apparatus, apparatus for clocking the data generating apparatus with a jittered clock, apparatus for applying a stream of data generated by the data generating apparatus that has been jittered by the jittered clock to an input of the CRU, and apparatus for detecting a bit error rate of a data signal output from the CRU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.