Non-volatile memory enabling simultaneous reading and writing by time multiplexing a decode path
US5841696A · kind A · utility
53Cited by
10References
40Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 5, 1997 |
| Grant date | Nov 24, 1998 |
| Priority date | — |
| Expiry date | Mar 5, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory that allows simultaneous reading and writing operations by time multiplexing a single x-decode path between read and write operations. This is accomplished using appropriate timing signals to store/latch a first word line for a first operation and then relinquishing the x-decode path so that a second operation can load an address and access a second word line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.