Consolidated chip design for wire bond and flip-chip package technologies
US5844317A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 26, 1996 |
| Grant date | Dec 1, 1998 |
| Priority date | — |
| Expiry date | Jul 26, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/13
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor structure and method of fabrication are provided in which permanent external electrical connection to active circuitry in the structure can be made through either a wire bond pad or metal bump formed thereon. A final metallization including a wire bond pad is disposed over and electrically connected with the active circuitry. An insulating material film is disposed over the final metallization leaving the wire bond pad and a portion of the final metallization laterally displaced from the pad exposed. A metal bump contacts the laterally displaced exposed portion of the final metallization. The wire bond pad is electrically coupled with and laterally displaced from the metal bump through the final metallization. The metal bump and wire bond pad are configured to facilitate electrical connection of the semiconductor structure with an external connector, such as a modular packaging substrate. The structure may also be used for testing and burning in a semiconductor die without direct physical contact of the external testing device to the wire bond pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.