Allan Robert Bertolet
10Patents
9h-index
23Co-inventors
64Inventor score
Filing activity: Jun 4, 1993 → Apr 17, 1998
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5671432A | Programmable array I/O-routing resource | Electricity | 90 | Expired |
| US6204074A | Chip design process for wire bond and flip-chip package | Electricity | 76 | Expired |
| US5910733A | Method and system for layout and schematic generation for heterogeneous arrays | Physics | 74 | Expired |
| US5844317A | Consolidated chip design for wire bond and flip-chip package technologies | Electricity | 69 | Expired |
| US6025744A | Glitch free delay line multiplexing technique | Electricity | 50 | Expired |
| US5646546A | Programmable logic cell having configurable gates and multiplexers | Electricity | 38 | Expired |
| US5781032A | Programmable inverter circuit used in a programmable logic cell | Electricity | 19 | Expired |
| US5748009A | Programmable logic cell | Electricity | 10 | Expired |
| US5734582A | Method and system for layout and schematic generation for heterogeneous arrays | Physics | 9 | Expired |
| US5389836A | Branch isolation circuit for cascode voltage switch logic | Electricity | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.