Method and system for providing a double diffuse implant junction in a flash device
US5854108A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 4, 1996 |
| Grant date | Dec 29, 1998 |
| Priority date | — |
| Expiry date | Jun 4, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0411
Abstract
A system and method for providing a very short channel memory cell having a double diffuse implant junction is disclosed. The system and method comprise the sequential steps of providing a junction implant, providing a spacer, and providing a double diffuse implant. Because the double diffuse implant is provided after the spacer, the double diffuse implant does not extend as far under the gate of a memory cell after processing. Thus, the memory cell has a graded junction that does not substantially shorten the effective length of the channel. The memory cell can, therefore, function even as the size of the memory cell is decreased. In addition, the thermal cycling of the double diffuse implant may be decoupled from that of the junction implant. This is achieved without complicating processing. Consequently, overall system performance is enhanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.