Method of fabricating GMR devices
US5861328A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 1996 |
| Grant date | Jan 19, 1999 |
| Priority date | — |
| Expiry date | Oct 7, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
Abstract
A method of fabricating GMR devices on a CMOS substrate structure with a semiconductor device formed therein. The method includes forming a dielectric system with a planar surface having a roughness in a range of 1 .ANG. to 20 .ANG. RMS on the substrate; disposing and patterning films of giant magneto-resistive material on the planar surface so as to form a memory cell; disposing a dielectric cap on the cell so as to seal the cell and provide a barrier to subsequent operations; forming vias through the dielectric cap and the dielectric system to interconnects of the semiconductor device; forming vias through the dielectric cap to the magnetic memory cell; and depositing a metal system through the vias to the interconnects and to the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.