Patent · US Expired

System and method for simulating a multiprocessor environment for testing a multiprocessing interrupt controller

US5862366A · kind A · utility

25Cited by
7References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 12, 1996
Grant dateJan 19, 1999
Priority date
Expiry dateSep 12, 2016

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/2221
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A multiprocessing system comprising a plurality of processors and a plurality of I/O devices. A central interrupt control unit functionally intercouples the plurality of processors and I/O devices. The central interrupt control unit is configured to receive interrupt signals from the I/O devices and is configured to distribute interrupt signals to the processors. One of the processors is configured as a master test processor to control a test mode for testing the central interrupt control unit. The master test processor is further configured to release the other processors and emulate a multiprocessing environment.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.