Michael T. Wisor
35Patents
19h-index
17Co-inventors
74Inventor score
Filing activity: Dec 1, 1993 → Oct 19, 2004
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5511203A | Power management system distinguishing between primary and secondary system activity | Emerging Cross-Sectional Technologies | 150 | Expired |
| US5774544A | Method an apparatus for encrypting and decrypting microprocessor serial numbers | Electricity | 88 | Expired |
| US5790663A | Method and apparatus for software access to a microprocessor serial number | Physics | 58 | Expired |
| US5664205A | Power management control technique for timer tick activity within an interrupt driven computer system | Emerging Cross-Sectional Technologies | 56 | Expired |
| US5442794A | Disable technique employed during low battery conditions within a portable computer system | Physics | 49 | Expired |
| US5504910A | Power management unit including software configurable state register and time-out counters for protecting against misbehaved software | Emerging Cross-Sectional Technologies | 44 | Expired |
| US5790783A | Method and apparatus for upgrading the software lock of microprocessor | Physics | 44 | Expired |
| US5606662A | Auto DRAM parity enable/disable mechanism | Physics | 31 | Expired |
| US5999476A | Bios memory and multimedia data storage combination | Physics | 29 | Expired |
| US5799203A | System for receiving peripheral device capability information and selectively disabling corresponding processing unit function when the device failing to support such function | Physics | 28 | Expired |
| US6076160A | Hardware-based system for enabling data transfers between a CPU and chip set logic of a computer system on both edges of bus clock signal | Physics | 28 | Expired |
| US6247146A | Method for verifying branch trace history buffer information | Physics | 27 | Expired |
| US5815734A | System and method for reconfiguring configuration registers of a PCI bus device in response to a change in clock signal frequency | Physics | 27 | Expired |
| US6173395A | Mechanism to determine actual code execution flow in a computer | Physics | 26 | Expired |
| US5946497A | System and method for providing microprocessor serialization using programmable fuses | Physics | 25 | Expired |
| US5862366A | System and method for simulating a multiprocessor environment for testing a multiprocessing interrupt controller | Physics | 25 | Expired |
| US5790871A | System and method for testing and debugging a multiprocessing interrupt controller | Physics | 24 | Expired |
| US5964859A | Allocatable post and prefetch buffers for bus bridges | Physics | 24 | Expired |
| US5625807A | System and method for enabling and disabling a clock run function to control a peripheral bus clock signal | Physics | 23 | Expired |
| US5768499A | Method and apparatus for dynamically displaying and causing the execution of software diagnostic/test programs for the silicon validation of microprocessors | Physics | 19 | Expired |
| US6823435B1 | Non-volatile memory system having a programmably selectable boot code section size | Physics | 17 | Expired |
| US5666559A | Fail-safe communication abort mechanism for parallel ports with selectable NMI or parallel port interrupt | Physics | 17 | Expired |
| US6336212B1 | Self modifying code to test all possible addressing modes | Physics | 17 | Expired |
| US5678065A | Computer system employing an enable line for selectively adjusting a peripheral bus clock frequency | Physics | 15 | Expired |
| US5920891A | Architecture and method for controlling a cache memory | Physics | 13 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.