Single digit line with cell contact interconnect
US5866928A · kind A · utility
7Cited by
6References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 16, 1996 |
| Grant date | Feb 2, 1999 |
| Priority date | — |
| Expiry date | Jul 16, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/907
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated memory circuit comprises a plurality of memory cells and access transistors; and a digit line comprising conductive tabs extending from at least one side of a conductive digit line. The use of one digit line allows for a reduction in internal noise and coupling between digit line pairs. The use of one digit line also allows for a reduction in array size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.