Testable programmable gate array and associated LSSD/deterministic test methodology
US5867507A · kind A · utility
92Cited by
14References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 12, 1995 |
| Grant date | Feb 2, 1999 |
| Priority date | — |
| Expiry date | Dec 12, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318558
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A programmable gate array includes test subsystems for testing various functional subsystems of the programmable gate array. A sequence of test methods, employing the test subsystems, test the functionality of the programmable gate array, taking into account the interdependencies of the various subsystems and accordingly enabling fault isolation therein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.