Method of screening memory cells at room temperature that would be rejected during hot temperature programming tests
US5870407A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 1996 |
| Grant date | Feb 9, 1999 |
| Priority date | — |
| Expiry date | May 24, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a semiconductor manufacturing process for manufacturing memory devices a method of screening hot temperature programmability rejects in memory devices during wafer sort at room temperature that would be rejected at class test at high temperature. All cells in the memory device are subjected to a first sequence of programming pulses at a voltage lower than the standard programming voltage. The number of pulses in the first sequence of programming pulses is from 1-5. Those die that verify as having been successfully programmed are passed. Those die that do not verify as having been programmed are subjected to a second sequence of programming pulses at a voltage lower than the standard programming voltage. The number of pulses in the second sequence of programming pulses is from 10 to 15 pulses. Those that verify as being programmed are marked as good and those that do not are repaired and retested.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.