Edward Hsia
18Patents
10h-index
28Co-inventors
72Inventor score
Filing activity: Aug 31, 1981 → Oct 2, 2003
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US4573865A | Multiple-impingement cooled structure | Emerging Cross-Sectional Technologies | 101 | Expired |
| US6436768B1 | Source drain implant during ONO formation for improved isolation of SONOS devices | Electricity | 94 | Expired |
| US4526226A | Multiple-impingement cooled structure | Mechanical Engineering; Lighting; Heating | 53 | Expired |
| US4798515A | Variable nozzle area turbine vane cooling | Emerging Cross-Sectional Technologies | 39 | Expired |
| US6967873B2 | Memory device and method using positive gate stress to recover overerased cell | Physics | 34 | Expired |
| US6791880B1 | Non-volatile memory read circuit with end of life simulation | Physics | 26 | Expired |
| US6778442B1 | Method of dual cell memory device operation for improved end-of-life read margin | Physics | 16 | Expired |
| US6822909B1 | Method of controlling program threshold voltage distribution of a dual cell memory device | Physics | 16 | Expired |
| US6775187B1 | Method of programming a dual cell memory device | Physics | 13 | Expired |
| US6768673B1 | Method of programming and reading a dual cell memory device | Physics | 11 | Expired |
| US5724365A | Method of utilizing redundancy testing to substitute for main array programming and AC speed reads | Physics | 8 | Expired |
| US6901010B1 | Erase method for a dual bit memory cell | Physics | 8 | Expired |
| US6771545B1 | Method for reading a non-volatile memory cell adjacent to an inactive region of a non-volatile memory cell array | Physics | 6 | Expired |
| US5870407A | Method of screening memory cells at room temperature that would be rejected during hot temperature programming tests | Physics | 6 | Expired |
| US5751633A | Method of screening hot temperature erase rejects at room temperature | Physics | 6 | Expired |
| US6381550B1 | Method of utilizing fast chip erase to screen endurance rejects | Physics | 5 | Expired |
| US6956768B2 | Method of programming dual cell memory device to store multiple data states per cell | Physics | 3 | Expired |
| US6813752B1 | Method of determining charge loss activation energy of a memory array | Physics | 3 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.