Semiconductor integrated circuit arrangement fabrication method
US5874013A · kind A · utility
13Cited by
3References
99Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 15, 1997 |
| Grant date | Feb 23, 1999 |
| Priority date | — |
| Expiry date | May 15, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76802
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited to a metastable state in a plasma and a flon gas to interact with each other, and selectively obtaining desired dissociated species.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.