Low-voltage punch-through transient suppressor employing a dual-base structure

US5880511A · kind A · utility

Assignee

• Semtech Corporation · US

Inventors

• Bin Yu · Cupertino, US
• Chenming Hu · Alamo, US
• Ya-Chin King · Hsinchu, TW
• Jeffrey T. Pohlman · Camarillo, US
• Rita Trivedi · Lake Forest, US

Key dates

• Filing date: Jun 30, 1995
• Grant date: Mar 9, 1999
• Expiry date: Jun 30, 2015

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D8/25

Abstract

A punch-through diode transient suppression device has a base region of varying doping concentration to improve leakage and clamping characteristics. The punch-through diode includes a first region comprising an n+ region, a second region comprising a p- region abutting the first region, a third region comprising a p+ region abutting the second region, and a fourth region comprising an n+ region abutting the third region. The peak dopant concentration of the n+ layers should be about 1.5E18 cm.sup.-3, the peak dopant concentration of the p+ layer should be between about 1 to about 5 times the peak concentration of the n+ layer, and the dopant concentration of the p- layer should be between about 0.5E14 cm.sup.-3 and about 1.0E17 cm.sup.-3. The junction depth of the fourth (n+) region should be greater than about 0.3 um. The thickness of the third (p+) region should be between about 0.3 um and about 2.0 um, and the thickness of the second (p-) region should be between about 0.5 um and about 5.0 um.