Method of chemically mechanically polishing an electronic component using a non-selective ammonium hydroxide slurry
US5885899A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 1995 |
| Grant date | Mar 23, 1999 |
| Priority date | — |
| Expiry date | Nov 14, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3212
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming interlevel studs in an insulating layer on a semiconductor wafer. First, a conformal BPSG layer is formed on a Front End of the Line (FEOL) semiconductor structure. Vias are opened through the BPSG layer to the FEOL structure. A layer of poly is formed (deposited) on the BPSG layer, filling the vias. The poly layer may be insitu doped poly or implanted after it is deposited. The wafer is annealed to diffuse dopant from the poly to form diffusions wherever the poly contacts the substrate. A non-selective slurry of colloidal silica and at least 1% ammonium hydroxide is used to chem-mech polish the poly from the BPSG layer and, simultaneously, planarize the BPSG layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.