Trench transistor with localized source/drain regions implanted through selectively grown oxide layer

US5888880A · kind A · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Mark I. Gardner · Mabank, US
• H. Jim Fulford · Austin, US
• Frederick N. Hause · Austin, US

Key dates

• Filing date: Oct 30, 1996
• Grant date: Mar 30, 1999
• Expiry date: Oct 30, 2016

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/513

Abstract

A method of forming an IGFET includes forming a trench with opposing sidewalls and a bottom surface in a substrate, selectively growing an oxide layer on the bottom surface so that the oxide layer includes a thick region between thin regions, implanting localized source and drain regions through the thin regions using the thick region as an implant mask, stripping the oxide layer, forming a gate insulator and gate electrode in the trench, and forming a source and drain in the substrate that include the localized source and drain regions adjacent to the bottom surface of the trench. The localized source and drain regions provide accurately positioned channel junctions beneath the trench. Furthermore, the locations and dopant concentrations of the localized source and drain regions are controlled by the dimensions of the selectively grown oxide layer.