Silicon sidewall etching
US5895273A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 1997 |
| Grant date | Apr 20, 1999 |
| Priority date | — |
| Expiry date | Jun 27, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3065
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Decoupled plasma etching process used to make a protruding structure having vertical or near vertical sidewalls. The decoupled plasma etching process comprises the following steps: PA1 forming a mask on top of a semiconductor substrate defining the lateral size of the protruding structures to be formed in said substrate, PA1 feeding HCl, Cl.sub.2 and N.sub.2 into a plasma chamber to provide an ion plasma when applying source power, PA1 causing said ions to diffuse towards the substrate by applying a bias power such that the portions of said substrate not being covered by said mask are etched away, wherein the dosage of HCl, Cl.sub.2 and N.sub.2 is chosen such that newly formed portions of the sidewall surfaces are passivated by by-product of Si, Cl, and N.sub.2 and thus become protected from further being etched. The bias power is less than 70 Watts to ensure that the etching process is predominantly chemical.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.