Semiconductor device and fabrication process thereof
US5895948A · kind A · utility
20Cited by
7References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 25, 1997 |
| Grant date | Apr 20, 1999 |
| Priority date | — |
| Expiry date | Sep 25, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/312
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A silicon layer serving as a contact plug directly connected to a diffusion layer of a MOS transistor is provided. On a surface of an N.sup.- type diffusion layer in self-alignment with a silicon nitride layer spacer and a field oxide layer, an N.sup.+ type monocrystalline silicon layer formed by anisotropic selective epitaxial growth method is directly connected. The surface of the N.sup.+ type monocrystalline silicon layer is directly connected to an N.sup.+ type monocrystalline silicon layer formed by isotropic selective epitaxial growth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.