Method of forming chip bumps of bump chip scale semiconductor package
US5908317A · kind A · utility
91Cited by
17References
20Claims
0Family size
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Key dates
| Filing date | Mar 7, 1997 |
| Grant date | Jun 1, 1999 |
| Priority date | — |
| Expiry date | Mar 7, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming chip bumps of a bump chip scale semiconductor package, such a package and a chip bump are disclosed. In the bump chip scale semiconductor package produced by the above method, the chip bumps are directly formed on the chip pads of a semiconductor chip. The above chip bumps are used as the signal input and output terminals of the package and are used as surface mounting joints when the chip is mounted to a mother board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.