Memory architecture for recording of multiple messages
US5909387A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 1997 |
| Grant date | Jun 1, 1999 |
| Priority date | — |
| Expiry date | Jun 2, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory stores multiple messages such as multiple sound clips and includes storage cells dedicated to storage of samples that constitute the messages and EOM cells dedicated to storage of marks identifying boundaries of the messages. In one embodiment, a set of the EOM cells are together in a row of an array, and each such EOM cell is associated with storage cells in the same column of the array. Each EOM cell is erased together with associated storage cells. To avoid overerase of EOM cells, a write process for a storage cell asserts a write pulse to the associated EOM cell. Write pulses resulting from writing of multiple storage cells associated with an EOM cell, change a threshold voltage of the EOM cell from the erased state to a partially programmed state. The EOM cell associated with a boundary of a message can be programmed to a state that differs from the partially programmed state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.