Method for dressing a polishing pad during polishing of a semiconductor wafer
US5913714A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 1998 |
| Grant date | Jun 22, 1999 |
| Priority date | — |
| Expiry date | Sep 15, 2018 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B53/017
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A polishing pad dressing method uses a polishing head for polishing a semiconductor wafer. This polishing head includes a housing, a wafer carrier movably mounted to the housing, and a pad dressing element movably mounted to the housing. The wafer carrier forms a wafer-supporting surface, and the dressing element surrounds the wafer-supporting surface. A first fluid actuator is coupled to the dressing element to bias the pad dressing element with respect to the housing, and a second fluid actuator is coupled to the wafer carrier to bias the wafer carrier with respect to the housing. First and second fluid conduits are coupled to the first and second actuators, respectively, such that fluid pressures in the first and second actuators are separately and independently adjustable with respect to one another. Biasing forces on the dressing element can thereby be dynamically adjusted with respect to biasing forces on the carrier during a polishing operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.