Pulse stuffing circuit for programmable delay line
US5923197A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 31, 1997 |
| Grant date | Jul 13, 1999 |
| Priority date | — |
| Expiry date | Jul 31, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/135
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A delay line formed by a set of series-connected logic gates produces a sequence of output pulses in delayed response to a sequence of input pulses. The delay provided by a delay line changes with the frequency of its input pulse sequence because of temperature change in the gates due to changing power usage. Therefore a pulse stuffing circuit is provided to monitor the sequence of input pulses supplied to the delay line and to generate one or more stuff pulses when a period between successive input pulses exceeds a target maximum period. Each stuff pulse is sent as an additional input pulse to the delay circuit to decrease the period between input signal pulses. Although the delay circuit adds extra pulses to its output pulse sequence in response to the stuff pulses, the pulse stuffing circuit includes a gating circuit for removing those extra pulses from the output pulse sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.