Brian J. Arkin
15Patents
9h-index
9Co-inventors
61Inventor score
Filing activity: Feb 8, 1993 → Aug 18, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6028439A | Modular integrated circuit tester with distributed synchronization and control | Physics | 72 | Expired |
| US5963074A | Programmable delay circuit having calibratable delays | Electricity | 60 | Expired |
| US6073263A | Parallel processing pattern generation system for an integrated circuit tester | Physics | 30 | Expired |
| US5951705A | Integrated circuit tester having pattern generator controlled data bus | Physics | 30 | Expired |
| US5280486A | High speed fail processor | Physics | 14 | Expired |
| US7243278B2 | Integrated circuit tester with software-scaleable channels | Physics | 12 | Expired |
| US6060898A | Format sensitive timing calibration for an integrated circuit tester | Physics | 12 | Expired |
| US6380730B1 | Integrated circuit tester having a program status memory | Physics | 11 | Expired |
| US6256757A | Apparatus for testing memories with redundant storage elements | Physics | 10 | Expired |
| US5919270A | Programmable formatter circuit for integrated circuit tester | Physics | 9 | Expired |
| US5917834A | Integrated circuit tester having multiple period generators | Physics | 8 | Expired |
| US5923197A | Pulse stuffing circuit for programmable delay line | Electricity | 8 | Expired |
| US8400176B2 | Wafer level contactor | Physics | 4 | Active |
| US7893701B2 | Method and apparatus for enhanced probe card architecture | Physics | 1 | Active |
| US6836868B1 | High-speed algorithmic pattern generator | Physics | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.