Semiconductor trench isolation structure formed substantially within a single chamber
US5937308A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 1997 |
| Grant date | Aug 10, 1999 |
| Priority date | — |
| Expiry date | Mar 26, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76224
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substantially in situ trench isolation process is provided. The process includes forming a trench regions between active regions in a semiconductor substrate. The semiconductor substrate may be covered with a protective oxide pad and/or nitride layer. In a single chamber, an oxide is thermally grown in the trench, the nitride layer is substantially stripped, and a fill dielectric is deposited in the trench and over the active and trench regions. The invention contemplates thermal growth, etch, and deposition processes to be performed serially in a single chamber without opening the chamber. The invention further contemplates modifying or adapting a conventional process chamber to all for the in situ processing of thermal growth, etch, and deposition processes. Alternatively, a specialized chamber may be provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.