Trench isolation structure having low K dielectric spacers arranged upon an oxide liner incorporated with nitrogen
US5943585A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 1997 |
| Grant date | Aug 24, 1999 |
| Priority date | — |
| Expiry date | Dec 19, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76237
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process is provided for forming a trench isolation structure which includes dielectric spacers composed of a dielectric material having a relatively low dielectric constant, K, that is approximately less than 3.8. The capacitance between active areas separated by the trench isolation structure, being directly proportional to K, is thus reduced. In an embodiment, a trench is etched within a semiconductor substrate upon which a masking layer is formed. An oxide liner which is incorporated with nitrogen atoms is thermally grown upon the sidewalls and base of the trench. A layer of low K dielectric material is deposited across the oxide liner and the masking layer. The dielectric material is anisotropically etched to form sidewall spacers upon the oxide liner. A fill oxide is then formed within the trench upon the sidewall spacers and the oxide liner. The resulting trench isolation structure includes a low K dielectric material interposed between an oxide liner and a fill oxide. The trench isolation structure is less is likely to experience current leakage during the operation of an ensuing integrated circuit employing the isolation structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.