Method of making a dielectric for an integrated circuit
US5960302A · kind A · utility
39Cited by
11References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 1996 |
| Grant date | Sep 28, 1999 |
| Priority date | — |
| Expiry date | Dec 31, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A composite 3-layer gate dielectric is disclosed. The upper and lower layers have a concentration of nitrogen atoms, while the middle layer has very few nitrogen atoms. The presence of the nitrogen atoms in the top sublayers provides resistance to boron diffusion from the top conductive layer and plasma damage during polysilicon gate stack formation and the presence of nitrogen in the bottom sublayer near the silicon-dielectric interface improves wearout, endurance, resistance to current stress and electron traps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.