Low switching field magnetoresistive tunneling junction for high density arrays
US5966323A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 1997 |
| Grant date | Oct 12, 1999 |
| Priority date | — |
| Expiry date | Dec 18, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5615
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A low switching field magnetoresistive tunneling junction memory cell including a first exchange coupled structure having a pair of magnetoresistive layers and an exchange interaction layer sandwiched therebetween so as to pin the magnetic vectors of the pair of layers anti-parallel, a second exchange coupled structure having a pair of magnetoresistive layers and an exchange interaction layer sandwiched therebetween so as to pin the magnetic vectors of the pair of layers anti-parallel, and electrically insulating material sandwiched between the first and second exchange coupled structures to form a magnetoresistive tunneling junction. Each of the first and second exchange coupled structures, and hence the memory cell, has no net magnetic moment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.